A Lightweight Non-Oscillatory Delay-Sensor for Remote Power Analysis
Résumé
Traditionally, there have been two main obstacles for practical power analysis attacks: the adversary needed physical access to the device, and they had to use sophisticated sensing equipment to obtain the samples. However, it is now known that an attacker may leverage remote access to the platform and internal sensors to perform power analysis attacks. Internal sensors are circuits created from components native to the device, for example the reconfigurable fabric in some heterogeneous SoCs. Now, the main drawbacks of these sensors are their large sizes and that they require precise placement to improve their fidelity. This facilitates their detection. In this paper, we describe a novel internal sensor created from an 8-bit multiplier. This circuit can be implemented with just two LUT6 and four CARRY4 in AMD-Xilinx FPGAs. It can produce up to 200 MSpS. Furthermore, no precise placement nor special hardware description are required in its implementation. To validate our claims, we have recovered the full key of an unprotected implementation of AES-128 clocked at 100 MHz with under 3e4 encryption traces.
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